(a) Field of the Invention
The present invention relates to a method of manufacturing a high voltage semiconductor device, and more particularly to a method of manufacturing a high voltage semiconductor device including a deep well and a gate oxide layer.
(b) Description of the Related Art
Generally, a high voltage semiconductor device is provided with a P-well and an N-well in a silicon substrate. The P-well is formed by implanting P-type impurities into a silicon substrate and then driving P-type impurities into the silicon substrate through annealing the silicon substrate at a high temperature. In addition, the N-well is formed by implanting N-type impurities into a silicon substrate and then driving N-type impurities into the silicon substrate through annealing the silicon substrate at a high temperature.
However, a total manufacturing time of a high voltage semiconductor device may become longer because each drive-in process for forming the P-well and N-well takes a long time to complete and each process should be performed separately.
The above information described in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form prior art with respect to the present invention.